AD767JN Integrated Circuit Chip Microprocessor-Compatible 12-Bit D/A Converter

Microprocessor-Compatible 12-Bit D/A Converter AD767*

FEATURES

• Complete 12-Bit D/A Function
  • On-Chip Output Amplifier
  • High Stability Buried Zener Reference
• Fast 40 ns Write Pulse
• 0.3" Skinny DIP and PLCC Packages
• Single Chip Construction
• Monotonicity Guaranteed Over Temperature
• Settling Time: 3 ms max to 1/2 LSB
• Guaranteed for Operation with 612 V or 615 V Supplies
• TTL/5 V CMOS Compatible Logic Inputs
• MIL-STD-883 Compliant Versions Available

PRODUCT DESCRIPTION

The AD767 is a complete voltage output 12-bit digital-toanalog converter including a high stability buried Zener reference and input latch on a single chip. The converter uses 12 precision high-speed bipolar current steering switches and a laser-trimmed thin-film resistor network to provide high accuracy.

Microprocessor compatibility is achieved by the on-chip latch. The design of the input latch allows direct interface to 12-bit buses. The latch responds to strobe pulses as short as 40 ns, allowing use with the fastest available microprocessors.

The functional completeness and high performance of the AD767 result from a combination of advanced switch design, high-speed bipolar manufacturing process, and the proven laser wafer-trimming (LWT) technology.

The subsurface (buried) Zener diode on the chip provides a low-noise voltage reference which has long-term stability and temperature drift characteristics comparable to the best discrete reference diodes. The laser trimming process which provides the excellent linearity is also used to trim the absolute value of the reference as well as its temperature coefficient. The AD767 is thus well suited for wide temperature range performance with ±1/2 LSB maximum linearity error and guaranteed monotonicity over the full temperature range. Typical full-scale gain T.C. is 5 ppm/°C.

PRODUCT HIGHLIGHTS

1. The AD767 is a complete voltage output DAC with voltage reference and digital latches on a single IC chip.

2. The input latch responds to write pulse widths as short as 40 ns assuring direct interface with the industry’s fastest microprocessors.

3. The internal buried Zener reference is laser-trimmed to 10.00 volts with a ±1% maximum error. The reference voltage is also available for external application.

4. The gain setting and bipolar offset resistors are matched to the internal ladder network to guarantee a low gain temperature coefficient and are laser trimmed for minimum full-scale and bipolar offset errors.

5. The precision high-speed current steering switches and on-board high-speed output amplifier settle within 1/2 LSB for a 10 V full-scale transition in 3.0 µs when properly compensated.

6. The AD767 is available in versions compliant with MIL-STD-883. Refer to the Analog Devices Military Products Databook or current AD767/883B data sheet for detailed specifications.

ABSOLUTE MAXIMUM RATINGS*

V_CC to Power Ground . . . . . . . . . . . . . . . . . . . . .0 V to +18 V

V_EE to Power Ground . . . . . . . . . . . . . . . . . . . . . 0 V to –18 V

Digital Inputs (Pins 11, 13–24)

    to Power Ground . . . . . . . . . . . . . . . . . . . . –1.0 V to +7.0 V

Ref In to Reference Ground . . . . . . . . . . . . . . . . . . . . . . ±12 V

Bipolar Offset to Reference Ground . . . . . . . . . . . . . . . . ±12 V

10 V Span R to Reference Ground . . . . . . . . . . . . . . . . . ±12 V

20 V Span R to Reference Ground . . . . . . . . . . . . . . . . . ±24 V

Ref Out, V_OUT (Pins 6, 9) . . . Indefinite short to power ground Momentary Short to VCC

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . .1000 mW

*Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

FUNCTIONAL BLOCK DIAGRAM