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|Features:||Gated Serial Data Inputs||Features4:||HBM EIA/JESD22-A114-B Exceeds 2000 V ◆ MM EIA/JESD22-A115-A Exceeds 200 V|
|Features2:||Asynchronous Master Reset||Features3:||Complies With JEDEC Standard No. 7A|
|Features5:||Multiple Package Options||Temperature:||−40 °C To +85 °C And −40 °C To +125 °C|
electronics ic chip,
integrated circuit components
164 8-bit serial-in, parallel-out shift register
1. General description
The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC164; 74HCT164 are 8-bit edge-triggered shift registers with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (DSA or DSB); either input can be used as an active HIGH enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied HIGH.
Data shifts one place to the right on each LOW-to-HIGH transition of the clock (CP) input and enters into Q0, which is the logical AND of the two data inputs (DSA and DSB) that existed one set-up time prior to the rising clock edge.
A LOW level on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs LOW.
■ Gated serial data inputs
■ Asynchronous master reset
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C.
3. Quick reference data
|Type number||Temperature range||Name||Description||Version|
|74HC164N||−40 °C to +125 °C||DIP14||plastic dual in-line package; 14 leads (300 mil)||SOT27-1|
|74HC164D||−40 °C to +125 °C||SO14||plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm||SOT108-2|
|74HC164DB||−40 °C to +125 °C||SSOP14||plastic shrink small outline package; 14 leads; body width 5.3 mm||SOT337-1|
|74HC164PW||−40 °C to +125 °C||TSSOP14||plastic thin shrink small outline package; 14 leads; body width 4.4 mm||
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Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
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