Anterwell Technology Ltd.

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DS1230Y-150+ 256k Nonvolatile SRAM SS Replaces RAM Module IC

Good quality Programmable IC Chips for sales
Good quality Programmable IC Chips for sales
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DS1230Y-150+ 256k Nonvolatile SRAM SS Replaces RAM Module IC

China DS1230Y-150+ 256k Nonvolatile SRAM SS Replaces RAM Module IC supplier
DS1230Y-150+ 256k Nonvolatile SRAM SS Replaces RAM Module IC supplier DS1230Y-150+ 256k Nonvolatile SRAM SS Replaces RAM Module IC supplier

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Product Details:

Place of Origin: Philippines
Brand Name: DALLAS
Certification: Original Factory Pack
Model Number: DS1230Y-150+

Payment & Shipping Terms:

Minimum Order Quantity: 5pcs
Price: Negotiation
Packaging Details: please contact me for details
Delivery Time: 1 Day
Payment Terms: T/T, Western Union,PayPal
Supply Ability: 600PCS
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Detailed Product Description
FEATURES: 10 Years Minimum Data Retention In The Absence Of External Power FEATURES2: Data Is Automatically Protected During Power Loss
FEATURES3:  Replaces 32k X 8 Volatile Static RAM, EEPROM Or Flash Memory Applications: Unlimited Write Cycles
Typical Applications 1: Low-power CMOS Typical Applications 2: Read And Write Access Times As Fast As 70 Ns
High Light:

low voltage power mosfet


hybrid inverter circuit


DS1230Y-150+ 256k Nonvolatile SRAM SS Replaces RAM Module IC





 10 years minimum data retention in the absence of external power


Data is automatically protected during power loss


 Replaces 32k x 8 volatile static RAM, EEPROM or Flash memory 


Unlimited write cycles 


Low-power CMOS 


Read and write access times as fast as 70 ns


 Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time 


Full ±10% VCC operating range (DS1230Y) 


Optional ±5% VCC operating range (DS1230AB) 


Optional industrial temperature range of -40°C to +85°C, designated IND 


JEDEC standard 28-pin DIP package


 New PowerCap Module (PCM) package

- Directly surface-mountable module

- Replaceable snap

-on PowerCap provides lithium backup battery

- Standardized pinout for all nonvolatile SRAM products

- Detachment feature on PowerCap allows easy removal using a regular screwdriver


DS1230Y-150+ 256k Nonvolatile SRAM SS Replaces RAM Module ICPIN DESCRIPTION

A0 - A14 - Address Inputs

DQ0 - DQ7 - Data In/Data Out

CE - Chip Enable

WE - Write Enable

OE - Output Enable

VCC - Power (+5V)

GND - Ground

NC - No Connect












The DS1230 256k Nonvolatile SRAMs are 262,144-bit, fully static, nonvolatile SRAMs organized as 32,768 words by 8 bits.


Each NV SRAM has a self-contained lithium energy source and control circuitry which constantly monitors VCC for an out-of-tolerance condition.


When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption.


DIP-package DS1230 devices can be used in place of existing 32k x 8 static RAMs directly conforming to the popular bytewide 28-pin DIP standard.


The DIP devices also match the pinout of 28256 EEPROMs, allowing direct substitution while enhancing performance. DS1230 devices in the Low Profile Module package are specifically designed for surface-mount applications.


There is no limit on the number of write cycles that can be executed and no additional support circuitry is required for microprocessor interfacing.




The DS1230 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip Enable) and OE (Output Enable) are active (low).


The unique address specified by the 15 address inputs (A0 - A14) defines which of the 32,768 bytes of data is to be accessed. Valid data will be available to the eight data output drivers within tACC (Access Time) after the last address input signal is stable, providing that CE and OE (Output Enable) access times are also satisfied.


If OE and CE access times are not satisfied, then data access must be measured from the later-occurring signal (CE or OE ) and the limiting parameter is either tCO for CE or tOE for OE rather than address access.



The DS1230 devices execute a write cycle whenever the WE and CE signals are active (low) after address inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the write cycle.


The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs must be kept valid throughout the write cycle.


WE must return to the high state for a minimum recovery time (tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during write cycles to avoid bus contention.


However, if the output drivers are enabled ( CE and OE active) then WE will disable the outputs in tODW from its falling edge.


DS1230AB Power Supply Voltage   VCC  4.75  5.0  5.25 V /
DS1230Y Power Supply Voltage VCC 4.5  5.0  5.5 V  
Logic 1  VIH  2.2    VCC  V  
Logic 0  VIL  0.0   0.8  V  

Contact Details
Anterwell Technology Ltd.

Contact Person: Miss. Sharon Yang

Tel: 86-755-61169882

Fax: 86-755-613169859

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