P89LPC935FDH Integrated Circuit Chip single-chip microcontroller

P89LPC933/934/935/936

8-bit microcontroller with accelerated two-clock 80C51 core

4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

General description

The P89LPC933/934/935/936 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC933/934/935/936 in order to reduce component count, board space, and system cost.

Principal features

■ 4 kB/8 kB/16 kB byte-erasable flash code memory organized into 1 kB/2 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.

■ 256-byte RAM data memory. Both the P89LPC935 and P89LPC936 also include a 512-byte auxiliary on-chip RAM.

■ 512-byte customer data EEPROM on chip allows serialization of devices, storage of setup parameters, etc. (P89LPC935/936).

■ Dual 4-input multiplexed 8-bit A/D converters/DAC outputs (P89LPC935/936, single A/D on P89LPC933/934).Two analog comparators with selectable inputs and reference source.

■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output) and a 23-bit system timer that can also be used as an RTC.

■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.

■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare functions (P89LPC935/936).

■ High-accuracy internal RC oscillator option allows operation without external oscillator components.The RC oscillator option is selectable and fine tunable.

■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).

■ 28-pin TSSOP, PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

Block diagram

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

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