Anterwell Technology Ltd.

          Anterwell Technology Ltd.

 

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POWER LOGIC 8-BIT SHIFT REGISTER cree cxb 3590 TPIC6C596DRG4

Good quality Programmable IC Chips for sales
Good quality Programmable IC Chips for sales
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POWER LOGIC 8-BIT SHIFT REGISTER cree cxb 3590 TPIC6C596DRG4

China POWER LOGIC 8-BIT SHIFT REGISTER  cree cxb 3590 TPIC6C596DRG4 supplier

Large Image :  POWER LOGIC 8-BIT SHIFT REGISTER cree cxb 3590 TPIC6C596DRG4

Product Details:

Place of Origin: Original
Brand Name: TI
Certification: Original Factory Pack
Model Number: TPIC6C596DRG4

Payment & Shipping Terms:

Minimum Order Quantity: 50pcs
Price: negotiation
Packaging Details: please contact me for details
Delivery Time: 1 day
Payment Terms: T/T, Western Union,PayPal
Supply Ability: 5200PCS
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Detailed Product Description
VCC (see Note 1): 7 V VI: −0.3 V To 7 V
VDS (see Note 2): 33 V Continuous Source-to-drain Diode Anode Current: 250 MA
Pulsed Source-to-drain Diode Anode Current (see Note 3): 500 MA
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TPIC6C596DRG4 POWER LOGIC 8-BIT SHIFT REGISTER cree cxb 3590

POWER LOGIC 8-BIT SHIFT REGISTER  cree cxb 3590 TPIC6C596DRG4► Low rDS(on) . . . 7 Ω Typ 

► Avalanche Energy . . . 30 mJ 

►Eight Power DMOS Transistor Outputs of 100-mA Continuous Current 

►250-mA Current Limit Capability 

►ESD Protection . . . 2500 V 

►Output Clamp Voltage . . . 33 V 

►Enhanced Cascading for Multiple Stages 

►All Registers Cleared With Single Input 

►Low Power Consumption

 

description

The TPIC6C596 is a monolithic, medium-voltage, low-current power 8-bit shift register designed for use in systems that require relatively moderate load power such as LEDs. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other low-current or medium-voltage loads.

 

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. When CLR is low, all registers in the device are cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) is clocked out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference.

 

 

POWER LOGIC 8-BIT SHIFT REGISTER  cree cxb 3590 TPIC6C596DRG4This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.

 

POWER LOGIC 8-BIT SHIFT REGISTER  cree cxb 3590 TPIC6C596DRG4

 

 

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