MC74VHCT138ADTR2 Electronic IC Chips high speed CMOS 3−to−8 Line Decoder

MC74VHCT138A

3−to−8 Line Decoder

The MC74VHCT138A is an advanced high speed CMOS 3−to−8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

When the device is enabled, three Binary Select inputs (A0 − A2) determine which one of the outputs (Y0 − Y7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems.

The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V, because they have full 5.0 V CMOS level output swings.

The VHCT138A input structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. The output structures also provide protection when V_CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc.

Features

• High Speed: t_PD = 7.6 ns (Typ) at V_CC = 5.0 V

• Low Power Dissipation: I_CC = 4 A (Max) at T_A = 25°C

• TTL−Compatible Inputs: V_IL = 0.8 V; V_IH = 2.0 V

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

• Designed for 4.5 V to 5.5 V Operating Range

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300 mA

• ESD Performance:

    Human Body Model > 2000 V;

    Machine Model > 200 V

• Chip Complexity: 122 FETs or 30.5 Equivalent Gates

• Pb−Free Packages are Available*

MAXIMUM RATINGS

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

†Derating − SOIC Packages: – 7 mW/C from 65 to 125℃

                     TSSOP Package: − 6.1 mW/C from 65 to 125℃

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